Google Might Adopt AMD Epyc Rome CPUs for Servers, Intel Xeon to be Phased Out?


    Intel is gradually losing its grip over the consumer market with AMD’s Ryzen 3000 chips becoming the company’s best product stack, ever. However, things might get worse for Intel and the 7nm storm might spill into the lucrative server space. Intel has an overwhelming majority in the enterprise space with more than 90% of the market share. At the rate AMD is going right now, that will most likely change in the coming years, starting with the Epyc Rome processors.

    According to Lynx Equity analysts, Google might ditch Intel’s Xeon chips in favor of the Epyc CPUs in its Data Centers and servers. The researchers claim that the server boards being shipped to Google Data Centers are AMD compatible, instead of the traditional Intel Xeon parts.

    Last month, company CEO Dr. Lisa Su unveiled the 64 core Epyc Rome processors based on the new 7nm Zen 2 architecture. The server part was twice as fast compared to the rival Xeon product all the while costing less. Though Intel released benchmarks comparing Rome to the Cascade Lake-AP chip packing 56 cores, it’s not really a fair comparison as the Epyc SKUs top out at $10,000 while the former is expected to cost somewhere in the $40-50K range and the performance delta is far from enough to warrant that kind of price tag.

    Like the Matisse chips, the Epyc CPU also incorporate the chiplet design. However, we are looking at up to eight dies per substrate, pushing the total core count up to 64. Now, imagine multiple-socket systems, and you’ve got more than 200 cores and 400 threads. Pretty insane.

    However, things aren’t going to be easy for team red as unlike the mainstream market, Intel has absolute dominance in the server space, and it’s likely that Google is only testing the waters with a shift to Epyc on some of its systems with the majority still utilizing Xeon. AMD will have to up its game with Milan and Genoa if it wants to keep the pressure on, as Intel is going to launch the 10nm Ice Lake SP next year which despite being clocked lower will have a notably higher IPC and increased core counts as well.

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