Intel’s Upcoming Lakefield CPUs Will Be Powerful & Power Efficient, Thanks to 3D Stacking Foveros Tech

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    Intel at CES
    Intel's logo is pictured during preparations at the CeBit computer fair, which will open its doors to the public on March 20, at the fairground in Hanover, Germany, March 19, 2017. REUTERS/Fabian Bimmer

    During the Hot Chips 31 presentation, Intel showcased their new Foveros technology with 3D chip stacking in CPUs. This enables the production of multiple dies of CPUs, GPUs stacked over one another in a single chip. The company announced that the Foveros tech will be used in its upcoming 10nm Lakefield processors which will begin the final phase of production in Q4 2019.

    The Lakefield processors will be based on a hybrid x86 architecture with dual-die layout stacked on top of one another. The lower die is a standard layer with I/O connections while the upper layer aka the compute die is a 10 nm processor with 1 performance core and 4 atom-based efficiency cores. For graphics, Lakefield will leverage the new Gen 11 iGPU for desktopgrade performance. All this enables Intel to produce chips that consume 1/10th of standby power while simultaneously increasing GFX performance by ~50% and reduce the core area by ~40%.

    The Lakefield lineup will give birth to a new mobility form factor with fan-less designs and low power consumption devices. Intel compared the standby power consumption of the upcoming Lakefield processors with 6th Gen Core processors to show a major leap in die manufacturing process and how the new Lakefield CPUs consume only 0.08x the power consumed by 6th Gen processors. The Lakefield chips will finish their production by the end of this year and should be available to consumers in Q1 2020.

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